Google is teaming up with tech industry partners to launch OpenTitan, an open source project to strengthen chip security. The initiative will build reference design and integration guidelines for root-of-trust (RoT) silicon chips to be implemented in data center servers, storage devices, peripherals, and other technologies.
The goal is to give chipmakers and platform providers the ability to inspect and contribute to the design, firmware, and documentation of silicon chips. By open-sourcing the chip design, members of OpenTitan hope to make the process more transparent and secure. RoT chips can be used in server motherboards, network cards, laptops, phones, routers, and Internet of Things devices.
Google has already built a secure chip in Titan, its custom RoT chip designed to make sure the machines in its data centers boot from a known trustworthy state with verified code. Titan is used in Google’s multifactor security keys and its Google-brand Android phones. OpenTitan brings secure silicon chip design to a broader level with a group of tech industry partners.
“What we’re launching isn’t a proposal or standard,” OpenTitan founder and Google Cloud director Dominic Rizzo said at a press conference. “It’s an active engineering project.”
Google is responsible for defending a huge volume of data center equipment around the world, Rizzo explained, and its growing attack surface demands new defensive technologies. As firmware-level attacks become “a realistic and growing concern,” it’s looking to the silicon layer.
“We felt that in order to build trust in our secure silicon, we needed to build the design from the ground up,” Rizzo said. The goal is to bring trust, code integrity, trusted machine identity, and physical attack protection into devices built with these RoT silicon chips. OpenTitan can be used with any platform and customized so it adapts to different types of devices and software.
OpenTitan is managed by UK nonprofit lowRISC and supported by ETH Zurich, G+D Mobile Security, Nuvoton Technology, and Western Digital. A team of engineers representing these partners is tasked with building the logical design of the silicon RoT. This includes an open source microprocessor (lowRISC Ibex), cryptographic coprocessors, a hardware random-number generator, sophisticated key hierarchy, memory hierarchies for volatile and nonvolatile storage, defensive mechanisms, I/O peripherals, and secure boot, among other components.
Open source silicon is similar to open source software in the way it folds trust and transparency into the design process. Issues can be detected early on, reducing the need for blind trust. A common, open reference design gives users a choice of implementation, and maintains a set of common interfaces and guarantees for software compatibility, officials explain in a release on the news.
The project aims to open source additional layers of the root of trust. In a traditional RoT structure, the open components include protocols, APIs, printed circuit board (PCB) interface, and PCB design, they say. In addition to these, OpenTitan also open sources the firmware, instruction set architecture, system-on-a-chip architecture, digital intellectual property (IP), register-transfer level verification, and chip packaging. The foundry IP, analog IP, physical design kit, and chip fabrication remain proprietary components.
Starting today, OpenTitan is inviting everyone to evaluate and contribute to its design. Hardware vendors are invited to reach out if they’re interested in a pilot OpenTitan RoT integration.
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Kelly Sheridan is the Staff Editor at Dark Reading, where she focuses on cybersecurity news and analysis. She is a business technology journalist who previously reported for InformationWeek, where she covered Microsoft, and Insurance & Technology, where she covered financial … View Full Bio